HW/SW Co-design for Accelerating Public-Key Cryptosystems over GF(p) on the 8051 μ-controller
نویسندگان
چکیده
Implementing large word-length public key algorithms on small 8-bit μ-controllers is a challenge. This paper presents a hardware/software co-design solution of RSA and Elliptic Curve Cryptography (ECC) over GF(p) on a 12 MHz 8-bit 8051 μ-controller. The hardware coprocessor has a modular arithmetic logic unit (MALU) of which the digit size (d) is variable. It can be adapted to the speed and bandwidth of the μ-controller to which it is connected. The HW/SW co-design space exploration is based on the GEZEL system-level design environment. It allows the designer to find the best performance-area combination for the digit size. A case study of an FPGA implementation for a 160-bit ECC over GF(p) (ECC-160p) shows that one point multiplication can be computed 40 times faster than an optimized SW implementation with the optimized digit size, d=4.
منابع مشابه
HW/SW co-design for public-key cryptosystems on the 8051 micro-controller
It is a challenge to implement large word length public-key algorithms on embedded systems. Examples are smartcards, RF-ID tags and mobile terminals. This paper presents a HW/SW co-design solution for RSA and Elliptic Curve Cryptography (ECC) over GF(p) on a 12 MHz 8-bit 8051 micro-controller. The hardware coprocessor has a Modular Arithmetic Logic Unit (MALU) of which the digit size (d) is var...
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